The invention relates to the field of metal-oxide-semiconductor memory devices and, more particularly, to an improved negative substrate bias generator for dynamic random access memories.
A negative bias voltage is typically applied by a back bias generator to the substrate of a metal-oxide-semiconductor (MOS) random access memory (RAM) to improve the overall performance of the MOS circuit. More specifically, the junction capacitance between the P-doped silicon substrate and adjacent N+ doped silicon layers is lowered when a negative voltage is applied to the substrate. Accordingly, the MOS circuitry operates at a faster speed. Also, a negatively biased substrate reduces the sensitivity of on-chip threshold voltages to variations in the potential between the source of an MOS transistor and the substrate bias. Recently, the back bias voltages have been generated on the chips themselves by using charge pump circuitry.
In order to achieve high performance in a 5 volt only RAM design, it is desirable to use enhancement mode MOS devices having a threshold voltage range of 150 to 650 millivolts with a back bias voltage between -2 to -3 volts. Also, it is desirable to construct a substrate bias pump which is capable of driving the potential on the substrate upwardly or downwardly to a desirable level. However, the preference for a low threshold range creates a few problems with the design of a substrate bias pump circuit. During the power-up of the pump, the substrate may have a positive potential ranging from 0 to 300 millivolts. As a result, enhancement mode MOS devices will have threshold voltages as low as several hundred millivolts negative. Accordingly, devices which are enhancement mode for normal circuit operation may operate in the depletion mode during power-up.
The pump oscillator and pump circuit must be able to start up and push the substrate negative in order for the transistors of the circuit to achieve the proper threshold voltage levels and operate as enhancement mode MOS devices. However, the pump oscillator must start in the absence of a substrate bias with its MOS devices, which are intended to be enhancement mode, operating in the depletion mode. In addition, assuming a proper start-up, there are several transistors in the output portion of the conventional pump which operate with their sources having a potential near the substrate voltage. These devices have a 0 volt back gate bias and may operate as depletion mode MOS transistors.
Another problem with previous charge pump circuitry is that the MOS devices used for coupling the driving signals to the pump have parasitic source and drain capacitances which impair the device coupling efficiency. As a result, the effectiveness of the pump is reduced. Also, diffusions or parasitic diodes from the MOS device which is connected to the substrate may cause electrons to be injected into the substrate. This is detrimental to the storage mechanism of the dynamic RAM.